Method for the hermetic encapsulation of a component

ABSTRACT

For hermetic encapsulation of a component, which includes a chip with component structures applied on a substrate in a flip-chip construction, a material is applied onto the lower edge of the chip and regions of the substrate abutting the chip, and then a first continuous metal layer is applied on the back side of the chip and on the material, as well as on edge regions of the substrate abutting the material. For hermetic encapsulation, a second sealing metal layer is subsequently applied by a solvent-free process at least on those regions of the first metal layer that cover the material.

BACKGROUND OF THE INVENTION

A method for hermetic encapsulation of a component is, for example,known from WO 99/43084. There components, in particular surface wavecomponents, are applied in a flip-chip technique to a substrate providedwith solderable connection areas. The component, which is fashioned onthe chip, is thereby soldered to the substrate over bumps (solder balls)at a slight distance from the substrate, such that the componentstructures located on the chip face the substrate. For hermeticencapsulation of the components located on the substrate, saidcomponents are ultimately covered from the back with a metal foil or ametal-coated plastic film (first metal layer) on the substrate and gluedor laminated. The foil thereby seals tight with the substrate betweenthe components, such that an encapsulation is created for the componentstructures.

After the application of the electrical component on the substrate, thelower edge of the chip and regions of the substrate abutting the chipare frequently covered with a material (under filler), for exampleorganosilic compound or epoxy resin filled with quartz, on which thefirst metal layer mentioned above is subsequently applied. In anotherembodiment, for example, a plastic film is applied on the back side ofthe component chip and regions of the substrate abutting the component,and the film is subsequently sealed with the substrate. The first metallayer is subsequently applied on this film.

In order to tightly encapsulate the component, a second metal layer isnormally deposited galvanically or, respectively, without current onthis first metal layer. During this galvanic process, small quantitiesof water can penetrate into the electrical component. This water canlead to long-term corrosion of the electrical component. Until now,after the galvanic reinforcement of the first metal layer, this moisturehas only been homogenously distributed in the component via a temperingstep at a typical temperature of 125° C., without completely removingthe moisture from said component.

SUMMARY OF THE INVENTION

It is therefore the object of the invention to specify a method forhermetic encapsulation of an electrical component which is simple toimplement and prevents the disadvantages cited above.

The invention proposes to first apply a component fashioned on a chiponto a substrate in a conventional flip-chip construction (method stepA) and to subsequently cover at least the lower edge of the chip andregions of the substrate abutting the chip with a material in aconventional manner in method step B). In method step C), a firstcontinuous metal layer is subsequently applied on the back side of thechip, on the material and on edge regions of the substrate abutting thematerial. A second hermetically sealing metal layer that covers thematerial is subsequently, inventively applied, at least on the regionsof the first metal layer, whereby this second metal layer is applied bymeans of a solvent-free and in particular water-free process (methodstep D). An electroplating using water-free organic solvent isalternatively also possible.

In contrast to the prior art, the second metal layer is not applied bymeans of a galvanic process in which water as solvent penetrates intothe component and can cause a corrosion of the component. Furthermore,the second metal layer is not applied on all regions on which the firstcontinuous metal layer is present, but rather only on those regions ofthe first metal layer that cover the insulating material. This has theadvantage that, in the inventive method, the consumption of the metalcan be significantly reduced for the second metal layer.

A whole series of processes are considered for a solvent-free process inthe method step B) to apply the second hermetically sealing metal layer.Thus, for example, it is possible to melt a metal foil onto the firstmetal layer. Before the application, this metal foil is advantageouslyadapted (stamped) to the contours of the first metal layer, such that itattaches to the first metal layer with a positive fit. This has theadvantage that, upon melting of this metal foil on the first metallayer, the second metal layer is generated with homogenous layerthickness, such that it particularly tightly seals the component.

Furthermore, it is possible that metal particles are applied in themethod step D). This can, for example, be implemented with the aid of aspray method in which the fluid metal beads are sprayed. Furthermore, ina further embodiment of the inventive method, a metal paste can beapplied and then baked. The second metal layer can also be applied bymeans of chemical vapor deposition (CVD) or physical vapor deposition(PVD). Furthermore, the second metal layer can also be sputtered ordeposited galvanically or without current with a water-free electrolyte.

The second metal layer can be applied continuously onto the first metallayer. In this case, the second metal layer thus covers not only thoseregions of the first metal layer that cover the material, but ratheralso further regions of the first metal layer that, for example, coverthe back side of the chip.

In a further advantageous variant of the inventive method, before theapplication of the second metal layer, a surface layer of the firstmetal layer can be removed to improve the bonding. Due to oxidationprocesses, a metal oxide layer to which the second metal layer bondsonly in a limited manner frequently forms on the first layer. For thisreason, this oxide layer is advantageously removed, for example via areducing hydrogen plasma, before the application of the second metallayer.

In another embodiment of the inventive method, in the method step B) thematerial is, for example, applied in the form of a plastic film, suchthat the plastic film covers the back side of the chip andsimultaneously the edges of the film overlap the chip. The film issubsequently sealed with the substrate in the entire edge region aroundthe chip. The first metal layer is then applied onto this plastic filmin the further method step C). This variant of the inventive method hasthe advantage that the method steps B) (application of the plastic film)and the method step C) (application of the first continuous metal layer)can be particularly well optimized independent of one another. Incooperation with the last method step D), a particularly secure hermeticencapsulation of the electrical component is thus possible via theapplication of the second metal layer. In this variant of the inventivemethod, the second hermetically sealing metal layer is advantageouslyapplied over the entire first continuous metal layer. It is therebyparticularly advantageously ensured that, in components encapsulatedaccording to this variant, no moisture can penetrate through both metallayers into the plastic film, and thus also into the component.

In a further variant of the inventive method, the metals for the firstand second metal layer and the process conditions for the application ofthe second metal layer in the method step D) are selected such that,during the application of the second metal layer, a metal alloy with amelting point of more than 260° C. is formed at the boundary areabetween the two metal layers. This has the advantage that the metalalloy does not melt, and therefore is also not permeable or losesrigidity, upon soldering of the inventively encapsulated component,which normally ensues at temperatures below 260° C. Such encapsulatedcomponent can thus be soldered without large problems as SMD componentsby means of standard soldering methods.

As a first metal layer, a titanium-copper layer is advantageouslyapplied in which a thicker copper layer is applied as a bonding agent toa very thin titanium layer. As a second metal layer, tin or eutectic tinalloys, for example, tin-silver, tin-copper or tin-silver copper alloysor a mix of the cited metals, are advantageously applied. This has theadvantage that the cited metals or, respectively, metal alloys are veryinexpensive for the first and second metal layer, but at the same time anon-eutectic tin-copper alloy with a melting point of greater than 260°C. is formed at the boundary area between the first metal layer and thesecond metal layer upon application of the second metal layer. By meansof this variant of the inventive method, it is thus particularlyadvantageously possible to generate, by means of inexpensive outputmaterials for both of the metal layers, an alloy with a particularlyhigh melting point that can not be melted during standard solderingmethods at standard temperature. The materials cited above for thesecond metal layer thereby exhibit melting points between approximately217° C. and 232° C. before the alloy formation.

In another variant of the inventive method, it is also possible to applya metal layer from the start in method step D) that exhibits a meltingpoint greater than 260° C. For example, tin-gold alloys with meltingpoints of approximately 280° C. are considered for this alternative.

The inventive method can be used for a hermetic encapsulation of themost varied components that can be mounted in flip-chip configuration,for example surface wave filters or other (particular surface-sensitive)components.

In the following, the inventive method should be explained in furtherdetail using Figures.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows the first method step or method step A) of the inventivemethod;

FIGS. 2A and 2B show two embodiments or variations of the second methodstep or method step B);

FIGS. 3A and 3B show both components shown in 2A and 2B after the thirdmethod step or method step C) of the inventive method;

FIGS. 4A and 4B show the electrical component after the fourth methodstep or method step D), which is the application of the second metallayer;

FIG. 5 shows the formation of an alloy with a high melting point betweenthe first metal layer and second metal layer; and

FIGS. 6 through 8 show the division of the substrate between twocomponents that have been applied, contacted and encapsulated on thesubstrate according to the method steps A) through D).

DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 shows an electrical component after the method step A). It isvisible that a chip 1 is attached and contacted on a substrate 25 suchthat the component structures 5 located on the chip surface face thesubstrate 25. Solder balls 10 (bumps) thereby affix the component at aslight distance from the substrate and simultaneouslyelectrically-conductively connect the connection areas 20 located on thesubstrate 25 with the component. A feedthrough 15 thereby provides forelectrical contact between the connection areas 20 and the bumps 10.

FIG. 2A shows a variant of the method steps B) of the inventive method.A plastic film 30 is continuously applied over the back side of the chip1 and the regions of the substrate 25 abutting the chip, and hassubsequently been sealed with the substrate in the entire edge region ofthe chip. An embodiment alternative to FIG. 2A is visible in FIG. 2B.The space between lower edge of the chip 1 and the regions of thesubstrate abutting thereon have been covered with a material 35. Thismaterial can, for example, be formed of silicon-organic compounds.

The component shown in FIG. 2A is visible in FIG. 3A after the methodstep C). The first metal layer 40, for example a titanium-copper layer,has been applied on the plastic film 30. FIG. 3B likewise shows thecomponent shown in FIG. 2B after the method step C). In this case, thefirst metal layer 40 has likewise been applied on the material 35 andthe back side of the chip. The first metal layer 40 can, for example, besputtered.

FIG. 4A shows the component from FIG. 3A after the application of thesecond metal layer 45 (method step D). In this case, the second metallayer 45 has been applied on the first layer 40 such that the firstmetal layer 40 is completely covered by the second metal layer. FIG. 4Blikewise shows the component shown in FIG. 3B after the method step D).In this embodiment, the second metal layer 45 is applied only on thoseregions of the first metal layer that cover the material 35, which issufficient for encapsulation.

FIG. 5 shows a layer 50 that has been formed on the boundary area of thefirst metal layer 40 and the second metal layer 45 upon application ofthe second metal layer 45. This intermediate layer 50 advantageouslyexhibits a melting point of greater than 260° C., such that theinventive encapsulation of the component no longer melts upon soldering.If a titanium-copper layer is applied as a first layer 40, either tin oreutectic tin alloys, for example, tin-silver, tin-silver-copper ortin-copper alloys, can advantageously be used as a second layer 45.These eutectics exhibit a homogenous composition and have definedmelting points of approximately 217° C. to 232° C. If the second metallayer is applied on the first metal layer at temperatures greater thanapproximately 280° C., thus the melting point of tin/gold, anon-eutectic tin-copper alloy that exhibits a melting point greater than260° C. forms via bonding of parts of the copper of the first layer withcomponent parts of the second layer. This non-eutectic alloy compriseslarger portions of copper than the copper-containing eutectic alloyscited above.

FIG. 6 shows a plurality of components that have been applied, contactedand encapsulated on the substrate according to the method steps A)through D). It is thereby possible with the inventive method to applyand to encapsulate identical or different components on the substrate.The chips can subsequently be isolated at the dividing lines designatedwith 55. For this, as shown in FIG. 6 the second metal layer can beablated, for example by means of a laser, in the region in which thesubstrate 25 is sectioned.

FIG. 7 shows how the first metal layer 40, which has been uncovered dueto the laser method cited above, is removed by means of a selectivechemical etching. Thus, for example, it is possible to use an ironchloride solution that selectively etches the first metal layer 40,which is formed of titanium and copper, without attacking the secondmetal layer 45, which is formed of tin or, respectively, tin alloys.After the removal of the first and second metal layer, the chips can,for example, be isolated via sawing of the substrate, as shown in FIG.8.

The invention is not limited to the exemplary embodiments shown here.Further variations are possible, both with regard to the materials forthe first and second metal layer and with regard to the type of theencapsulated components.

1. A method for production of an encapsulated encapsulation for anelectrical component comprising the steps of: attaching a component withmetallizations respectively fashioned on each of a plurality of chips achip to a substrate in a spaced manner that has electrical connectionareas so that the surface of the plurality of chips bearing componentstructures faces the substrate and bump connections electrically connectthe metallization of the substrate with the connection areas provided oneach of the plurality of chips provide a slight distance from thesubstrate; applying a material to cover at least the lower edges of theplurality of chips and a region of the substrate abutting the edges ofthe plurality of chips; applying a first, continuous metal layer on theback side of the plurality of chips, on the material and on edge regionsof the substrate abutting the material; applying a second, hermeticallysealing metal layer by a solvent-free process at least on the regions ofthe first metal layer that cover the material; subsequent to applyingthe second metal layer on the chips, isolating the individual componentsby sectioning between the chips outside of the edge regions of eachcomponent; wherein the step of applying the first metal layer comprisesapplying a titanium layer and then a copper layer on each of thecomponents, the step of applying the second metal layer comprisesapplying a metal layer selected from the group consisting of tin,tin-silver, tin-sliver copper alloys and mixtures of said metals on thefirst metal layer, said step of sectioning including removing the secondmetal layer in the regions to be sectioned to expose the first metallayer, chemically etching the exposed regions of the first metal layerto remove the exposed portions and subsequently sectioning by sawing thecomponents apart.
 2. A method according to claim 1, wherein the step ofapplying the second metal layer provides a metal foil placed onto thefirst metal layer and includes heating to melt the metal foil onto thefirst metal layer.
 3. A method according to claim 2, wherein the step ofproviding the metal foil provides a metal foil having contours of thefirst metal layer so that it lies on the first metal layer with apositive fit.
 4. A method according to claim 1, wherein the step ofapplying the second metal layer applies metal particles and then meltsthe particles onto the first metal layer.
 5. A method according to claim1, wherein the step of applying the second metal layer applies a metalpaste and then bakes the paste onto the first metal layer.
 6. A methodaccording to claim 1, wherein the step of applying the second metallayer utilizes a process selected from CVD and PVD.
 7. A methodaccording to claim 1, wherein the step of applying a second metal layersputters the second metal layer onto the first metal layer.
 8. A methodaccording to claim 1, wherein the step of applying the second metallayer applies the second layer continuously on the first metal layer. 9.A method according to claim 1, which, after applying the first metallayer and before applying the second metal layer, includes removingsurface layers of the first metal layer to improve the bonding of thesecond metal layer thereon.
 10. A method according to claim 1, wherein,after the step of applying the first metal layer, removing an oxidelayer from the first metal layer via a hydrogen plasma.
 11. A methodaccording to claim 1, wherein the step of applying the material appliesa plastic film on the back side of the chip to cover the back side, theedges of the chip and subsequently seals the film with the substrate inthe entire edge region around the chip.
 12. A method according to claim1, wherein the step of applying the second metal layer creates a metalalloy with a melting point greater than 260° C. in the boundary surfacebetween the first and second metal layers during the application of thesecond metal layer.
 13. A method according to claim 1, wherein the stepof applying the first metal layer applies a layer of titanium and alayer of copper on the layer of titanium.
 14. A method according toclaim 13, wherein the heating of the second metal layer produces atin-copper alloy with a melting point greater than 260° C. in theboundary between the first metal layer and the second metal layer.
 15. Amethod according to claim 1, wherein the step of chemically etchingutilizes an iron chloride solution.
 16. A method according to claim 1,wherein the component is a surface wave component.